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Usage Notes and Known Design Exceptions to Functional Specifications

Advisory Debug: Cross-Trigger Functionality is Limited When Using Breakpoints on the

C28x Core

Revision(s) Affected 0

Details When cross-triggering is enabled, halting at a breakpoint set for the C28x core does not

also halt the Cortex-M3 core.

Workaround(s) None. This is fixed in Revision A silicon.

Advisory Debug: Global Run of Cortex-M3 and TMS320C28x is not Operational

Revision(s) Affected 0

Details Due to missing signals in the debug logic, global run of the Cortex-M3 and C28x cores is

not enabled.

Workaround(s) None. This is fixed in Revision A silicon.

Advisory Debug: Control Subsystem Boot ROM M0 RAM-INIT Does Not Wait for RAM-INIT to

Complete

Revision(s) Affected 0

Details C-Boot-ROM sets the RAM-INIT bit to zero-initialize the entire M0 RAM every time it is

run after reset. However, it does not wait for the RAM-INIT to complete before accessing

M0 RAM for run-time stack. This does not cause any problem on stand-alone device

operation because this wait before RAM is accessed is inherently achieved by the wait

to access Flash. As Flash power-up time is more than the M0 RAM-INIT time and the

Boot ROM waits for Flash to power up completely before accessing RAM, by the time

C-Boot-ROM accesses M0 RAM for stack, it is initialized properly.

Workaround(s) On stand-alone device operation, this is not a problem because every time the device is

reset, Flash has to be brought back to active state and this wait for Flash to come to

active state is more than the time required for M0 RAM-INIT to complete.

During debug or development, when the emulator is connected and the user wants to

RUN through Boot ROM, care must be taken to ensure that Flash is not accessed before

running through boot initialization or the user should carefully step through Boot ROM

code at least until RAM-INIT is done, before clicking the RUN button on CCS.

This is fixed in Revision A silicon.

SPRZ357J–August 2011–Revised July 2014 F28M35x Concerto™ MCU Silicon Errata

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MAP electronics Cocerto-B Spezifikationen Seite 29