F28M35H20B1, F28M35H20C1, F28M35H22B1,F28M35H22C1, F28M35H32B1, F28M35H32C1,F28M35H50B1, F28M35H50C1, F28M35H52B1,F28M35H52C1 Concerto MCUSilicon Erra
Known Design Marginality/Exceptions to Functional Specificationswww.ti.comAdvisory Control Subsystem: Reset Value (/8) of CCLKCTL.CLKDIV Bit Field Vio
www.ti.comKnown Design Marginality/Exceptions to Functional SpecificationsAdvisory Master Subsystem: MNMIFLG.NMIINT Bit Will Not be Set in Some Cases
Known Design Marginality/Exceptions to Functional Specificationswww.ti.comAdvisory Master Subsystem Boot ROM: NMI Handler Can Return Before Clearing A
www.ti.comKnown Design Marginality/Exceptions to Functional SpecificationsAdvisory GPIO: GPIOs on Port C Do Not Toggle Correctly When Using the GPCTOG
Known Design Marginality/Exceptions to Functional Specificationswww.ti.comAdvisory Read of Clock Control Registers on C28x Memory Map is EALLOW-Protec
www.ti.comKnown Design Marginality/Exceptions to Functional SpecificationsAdvisory Flash ECC: When Program/Data Cache is Enabled, ECC Errors are Captu
Known Design Marginality/Exceptions to Functional Specificationswww.ti.comAdvisory VREG: VREG 'Warn Lo/High' Feature Does Not Work as Intend
www.ti.comKnown Design Marginality/Exceptions to Functional SpecificationsAdvisory RAM Controller: Cortex™-M3 Accesses to Shared RAM (Cx and Sx) and t
Documentation Supportwww.ti.com5 Documentation SupportFor device-specific data sheets and related documentation, visit the TI web site at: http://www.
www.ti.comRevision History6 Revision HistoryThis revision history highlights the technical changes made to the SPRZ357A errata document to make itan S
2SPRZ357B–August 2011–Revised January 2012Submit Documentation FeedbackCopyright © 2011–2012, Texas Instruments Incorporated
IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improveme
Contents1 Introduction ... 52 Dev
www.ti.comList of Figures1 Example of Device Markings ... 6
Silicon ErrataSPRZ357B–August 2011– Revised January 2012F28M35x Concerto MCU Silicon Errata1 IntroductionThis document describes the silicon updates t
x 980YMLLLLSYMLLLLS$$980G4Lot Trace Code2-Digit Year/Month CodeAssembly LotAssembly Site CodeWafer Fab Code as applicableTI EIA CodeGreen (Low H
www.ti.comKnown Design Marginality/Exceptions to Functional Specifications4 Known Design Marginality/Exceptions to Functional SpecificationsTable 2. A
Known Design Marginality/Exceptions to Functional Specificationswww.ti.comAdvisory Debug: Global Run of Cortex™-M3 and TMS320C28x™ is not OperationalR
www.ti.comKnown Design Marginality/Exceptions to Functional SpecificationsAdvisory NMI: Writing a " 0" to Any of the CNMIFRC/MNMIFRC Registe
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